Evidence map›Paper›PMID 42918782›Full record

ArticleNature communications2026

Reduced-DSP 200G/λ low-voltage slow-light silicon modulator enabled by built-in EO equalizer.

Keisuke Kawahara, Tai Tsuchizawa, Noritsugu Yamamoto, Yuriko Maegami, Koji Yamada, Nobuhiko Nishiyama, Toshihiko Baba

Abstract read
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Article in Nature communications, 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

0numbers the graph read from it
0cells of the map it votes in
0citing papers in PubMed
–field-weighted citation impact
1 · What the graph read from it

What it found

Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.

The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.

2 · The registry

The trial behind it

Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.

Neither the registry nor the abstract names a trial number. If this is a trial report, that itself is worth knowing.

3 · Its place in the literature

Who cites it

0 citing papers in PubMed.

No citing paper in PubMed yet.

4 · The record

Corrections and comments

PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.

5 · Who and what money

Authors and funding

7 authors.

Keisuke KawaharaDepartment of Electrical and Electronic Engineering, Institute of Science Tokyo, Tokyo, Japan. keisuke@ee.eng.isct.ac.jp.
Tai TsuchizawaNational Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Japan.
Noritsugu YamamotoNational Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Japan.
Yuriko MaegamiNational Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Japan.ORCID http://orcid.org/0000-0003-2218-3912
Koji YamadaNational Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Japan.ORCID http://orcid.org/0000-0002-8355-7060
Nobuhiko NishiyamaDepartment of Electrical and Electronic Engineering, Institute of Science Tokyo, Tokyo, Japan.
Toshihiko BabaDepartment of Electrical and Computer Engineering, Yokohama National University, Yokohama, Japan.ORCID http://orcid.org/0000-0002-2034-7381

Funding

MEXT | Japan Society for the Promotion of Science (JSPS) JP23KJ0988MEXT | Japan Society for the Promotion of Science (JSPS) JP25K23449New Energy and Industrial Technology Development Organization (NEDO) JPNP16007
6 · The paper itself

Abstract

Multi-Tb/s optical interconnects for artificial intelligence data centers necessitate high-speed, energy-efficient, and compact transceivers. However, conventional silicon Mach-Zehnder modulators are fundamentally limited by low modulation efficiency and large physical dimensions that typically extend several millimeters, requiring high-swing drivers and power-intensive digital signal processing to achieve data rates exceeding 100 Gb/s per lane. Here we show a silicon photonic crystal waveguide slow-light modulator that overcomes the bandwidth-efficiency trade-off via a built-in electro-optic equalizer. By monolithically integrating optical delay lines and crossings within segmented slow-light phase shifters, we synthesized an on-chip feedforward response that extends the 3-dB bandwidth. The fabricated modulator with a small device length of 320 µm demonstrated 140-Gb/s on-off keying operation with an energy consumption of 26 fJ/bit using drive voltages compatible with fin field-effect transistor-based complementary metal-oxide-semiconductor technology. Furthermore, four-level pulse amplitude modulation achieved 180 Gb/s without digital signal processing and 200 Gb/s with a low-complexity 11-tap digital equalizer. By reducing reliance on power-dissipating electronics, this strategy provides a potential route toward future dense multi-Tb/s co-packaged optics for energy-constrained switching systems.

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Registered trials

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Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.