ArticleSensors (Basel, Switzerland)2026
A CMOS Capacitive Fingerprint Sensor Chip with Column-Shared Charge-Accumulation Readout for Ridge-Valley Contrast Enhancement.
Article in Sensors (Basel, Switzerland), 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.
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Abstract
Capacitive fingerprint sensors are widely used in mobile, access-control, IoT, and biometric authentication systems because of their compact size, low power consumption, low cost, and CMOS compatibility. However, the small capacitance difference between fingerprint ridges and valleys can be degraded by passivation thickness, skin condition, contact pressure, contamination, and circuit noise, especially in high-resolution sensors with reduced pixel pitch. This work presents a CMOS capacitive fingerprint sensor chip with a column-shared charge-accumulation readout to enhance ridge-valley contrast. The proposed readout repeatedly senses the same pixel and accumulates the resulting charge-domain signals at the column level before analog-to-digital conversion, improving ridge-valley separability without increasing pixel-level circuit complexity. The chip was fabricated in a 0.18 μm CMOS process and includes a 144 × 40 sensor array with a 50 μm pixel pitch, corresponding to approximately 508 dpi. Fingerprint images were acquired from two participants for accumulation numbers from
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