Evidence map›Paper›PMID 42699561›Full record

ArticleHardwareX2026

Design and implementation of a portable, high-speed, wide-bandwidth FPGA-based electrical impedance tomography system.

Kendall R Farnham, Ethan K Murphy, Ryan J Halter

Abstract read
In one paragraph

Article in HardwareX, 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

0numbers the graph read from it
0cells of the map it votes in
0citing papers in PubMed
–field-weighted citation impact
1 · What the graph read from it

What it found

Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.

The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.

2 · The registry

The trial behind it

Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.

Neither the registry nor the abstract names a trial number. If this is a trial report, that itself is worth knowing.

3 · Its place in the literature

Who cites it

0 citing papers in PubMed.

No citing paper in PubMed yet.

4 · The record

Corrections and comments

PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.

5 · Who and what money

Authors and funding

3 authors.

Kendall R FarnhamDartmouth College, 15 Thayer Drive, Hanover, NH 03755, USA.
Ethan K MurphyDartmouth College, 15 Thayer Drive, Hanover, NH 03755, USA.
Ryan J HalterDartmouth College, 15 Thayer Drive, Hanover, NH 03755, USA.

Funding

Microendoscopic Electrical Impedance Sensing for Real-time Intraoperative Surgical Margin AssessmentR01CA237654 · NCI · DARTMOUTH COLLEGE · PI HALTER, RYAN JOSEPH · 2020 to 2024
$2.4M
NCI NIH HHS R01 CA237654
6 · The paper itself

Abstract

This paper describes the design of a small form-factor, low-cost, portable electrical impedance tomography (EIT) system with a custom analog front end and field-programmable gate array (FPGA) controller. Detailed analog and digital design choices are presented and discussed in the context of currently available state-of-the art hardware components and in relation to EIT-driven system requirements. The system is capable of acquisition speeds required for real-time imaging under appropriate acquisition configurations, provides high-SNR measurements over the 100 Hz to 1 MHz target bandwidth, and has customizable acquisition parameters to allow users to optimize the system for a wide variety of imaging applications. Hardware characterization results demonstrate competitive performance relative to existing small form-factor EIT systems, while multi-frequency imaging results demonstrate successful EIT image reconstruction across the evaluated frequency range. The development of this highly configurable, high-performing, portable EIT system provides a significant step toward expanding the practical use of multi-application, real-time EIT imaging.

Indexed as

Data acquisition systemElectrical impedance tomographyFPGA

Identifiers

PMID42699561
PMCPMC13543914

What OpenQuestion holds

Textmetadata
Read underepoch 390

Registered trials

None linked

Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.