Evidence map›Paper›PMID 42636025›Full record

ArticleAdvanced science (Weinheim, Baden-Wurttemberg, Germany)2026

Triple-Level Content-Addressable Vertical NAND Flash Memory.

Sung-Ho Park, Jiseong Im, Yeongheon Yang, Ryun-Han Koo, Jonghyun Ko, Mingyun Oh, Dongbeen Shin, Gyuweon Jung, Jong-Ho Lee

Abstract read
In one paragraph

Article in Advanced science (Weinheim, Baden-Wurttemberg, Germany), 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

0numbers the graph read from it
0cells of the map it votes in
0citing papers in PubMed
–field-weighted citation impact
1 · What the graph read from it

What it found

Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.

The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.

2 · The registry

The trial behind it

Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.

Neither the registry nor the abstract names a trial number. If this is a trial report, that itself is worth knowing.

3 · Its place in the literature

Who cites it

0 citing papers in PubMed.

No citing paper in PubMed yet.

4 · The record

Corrections and comments

PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.

5 · Who and what money

Authors and funding

9 authors.

Sung-Ho ParkDepartment of Electrical and Computer Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, Republic of Korea.ORCID https://orcid.org/0000-0001-7416-1059
Jiseong ImDepartment of Electrical and Computer Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, Republic of Korea.
Yeongheon YangResearch and Development Division, SK Hynix Inc., Icheon, Republic of Korea.
Ryun-Han KooDepartment of Electrical and Computer Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, Republic of Korea.
Jonghyun KoDepartment of Electrical and Computer Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, Republic of Korea.
Mingyun OhDepartment of Electrical and Computer Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, Republic of Korea.ORCID https://orcid.org/0009-0002-2255-1025
Dongbeen ShinDepartment of Electrical and Computer Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, Republic of Korea.ORCID https://orcid.org/0009-0004-0764-827X
Gyuweon JungDepartment of Electrical and Computer Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, Republic of Korea.ORCID https://orcid.org/0000-0003-0357-0933
Jong-Ho LeeDepartment of Electrical and Computer Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, Republic of Korea.ORCID https://orcid.org/0000-0003-3559-9802

Funding

National Research Foundation of Korea RS-2025-10032968Seoul National UniversitySK hynix Inc.
6 · The paper itself

Abstract

Content-addressable memory (CAM) enables massively parallel search by directly comparing input data with stored entries, offering a powerful paradigm for accelerating data-intensive tasks. Here, we present a triple-level content-addressable vertical NAND flash memory (V-NAND TLCAM) that exploits the eight threshold-voltage states of commercial triple-level-cell (TLC) V-NAND flash devices to achieve compact, high-throughput, and energy-efficient in-memory search. A parity-split (PS) scheme, in which odd and even word-lines are accessed separately, enhances the sensing margin and mitigates worst-case errors while preserving storage density and supporting don't-care matching. Measurements on >100-layer TLC V-NAND flash memory confirm stable operation with up to a 24× improvement in read-operation throughput and a 54.4× reduction in the estimated read energy compared with conventional readout. Furthermore, few-shot learning simulations on the Omniglot dataset demonstrate that the proposed TLCAM maintains over 90% accuracy in 5-shot learning, approaching GPU-based cosine similarity baselines. These results highlight V-NAND TLCAM as a scalable and energy-efficient hardware platform for bridging device-level innovations with practical machine learning applications.

Indexed as

content‐addressable memoryfew‐shot learningV‐NAND flash memory

Identifiers

PMID42636025
PMCPMC13502362

What OpenQuestion holds

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Registered trials

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Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.