ArticleAdvanced materials (Deerfield Beach, Fla.)2026
High-Mobility and Reliability Ultra-Thin-Channel Oxide Semiconductor Field-Effect Transistors for Chip-Interconnect-Embedded Logic and Ferroelectric Memory.
Chun-Kuei Chen, Sonu Hooda, Maheswari Sivan, Quanzhen Wan, Marco A Villena, Bastien Beltrando, Zefeng Xu, Zihang Fang, Evgeny Zamburg, Juan B Roldán and 3 more
Abstract read
In one paragraphArticle in Advanced materials (Deerfield Beach, Fla.), 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.
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5 · Who and what moneyAuthors and funding
13 authors.
Chun-Kuei ChenDepartment of Electrical and Computer Engineering, Singapore Hybrid-Integrated Next-Generation μ-Electronics Research Center (SHINE), National University of Singapore, Singapore, Singapore.
Sonu HoodaDepartment of Electrical and Computer Engineering, Singapore Hybrid-Integrated Next-Generation μ-Electronics Research Center (SHINE), National University of Singapore, Singapore, Singapore.ORCID https://orcid.org/0009-0007-3511-6408 Maheswari SivanDepartment of Electrical and Computer Engineering, Singapore Hybrid-Integrated Next-Generation μ-Electronics Research Center (SHINE), National University of Singapore, Singapore, Singapore.ORCID https://orcid.org/0000-0002-1344-292X Quanzhen WanDepartment of Electrical and Computer Engineering, Singapore Hybrid-Integrated Next-Generation μ-Electronics Research Center (SHINE), National University of Singapore, Singapore, Singapore.ORCID https://orcid.org/0000-0002-6111-2140 Marco A VillenaDepartment of Electronics and Computer Technology, University of Granada, Granada, Spain.
Bastien BeltrandoApplied Materials Inc., Santa Clara, USA.
Zefeng XuDepartment of Electrical and Computer Engineering, Singapore Hybrid-Integrated Next-Generation μ-Electronics Research Center (SHINE), National University of Singapore, Singapore, Singapore.
Zihang FangDepartment of Electrical and Computer Engineering, Singapore Hybrid-Integrated Next-Generation μ-Electronics Research Center (SHINE), National University of Singapore, Singapore, Singapore.
Evgeny ZamburgDepartment of Electrical and Computer Engineering, Singapore Hybrid-Integrated Next-Generation μ-Electronics Research Center (SHINE), National University of Singapore, Singapore, Singapore.ORCID https://orcid.org/0000-0002-4672-2813 Juan B RoldánDepartment of Electronics and Computer Technology, University of Granada, Granada, Spain.
Luca LarcherApplied Materials Inc., Santa Clara, USA.
Gaurav TharejaApplied Materials Inc., Santa Clara, USA.
Aaron Voon-Yew TheanDepartment of Electrical and Computer Engineering, Singapore Hybrid-Integrated Next-Generation μ-Electronics Research Center (SHINE), National University of Singapore, Singapore, Singapore.
Funding
Agency for Science, Technology and Research M24N7c0085Applied MaterialsNRF's Medium Sized Centre: Singapore Hybrid-Integrated Next-Generation µ-Electronics (SHINE) CentreRamón y Cajal MCIU/AEI/10.13039/501100011033Ramón y Cajal RYC2022-035618-I
6 · The paper itselfAbstract
Logic and memory transistors integrated with oxide semiconductors are promising for monolithic 3D systems that enable reconfigurable functionality and enhanced on-chip communication. However, challenges in controlling carrier mobility, carrier concentration, and defect density have hindered their deployment in advanced chip technologies. Here, we report a heterojunction oxide semiconductor channel approach that mitigates the interface/channel defect density and achieves field-effect mobility to >100 cm
Indexed as
ferro‐electricheterojunction channelIGZOITOlogic‐memory integrationoxide semiconductorthin film transistors
Identifiers
PMID42536039
PMCPMC13579180
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