Evidence map›Paper›PMID 42515528›Full record

ArticleSensors (Basel, Switzerland)2026

FPGA-Based Weighted DTW Framework with Hybrid Gait Symmetry Index for Real-Time Wearable Gait Classification.

Kishore Vennela, Bukya Balaji, Mangali Chinna Chinnaiah, Siew-Kei Lam, Narambhatla Janardhan, Penmetsa Subramanyam Raju, Dodde Hari Krishna, Gaddam Divya Vani, Mudasar Basha

Abstract read
In one paragraph

Article in Sensors (Basel, Switzerland), 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

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0cells of the map it votes in
0citing papers in PubMed
–field-weighted citation impact
1 · What the graph read from it

What it found

Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.

The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.

2 · The registry

The trial behind it

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Neither the registry nor the abstract names a trial number. If this is a trial report, that itself is worth knowing.

3 · Its place in the literature

Who cites it

0 citing papers in PubMed.

No citing paper in PubMed yet.

4 · The record

Corrections and comments

PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.

5 · Who and what money

Authors and funding

9 authors.

Kishore VennelaDepartment of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram 522302, Andhra Pradesh, India.ORCID 0000-0001-9721-0853
Bukya BalajiDepartment of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram 522302, Andhra Pradesh, India.
Mangali Chinna ChinnaiahDepartment of Electronics and Communication Engineering, B. V. Raju Institute of Technology, Medak District, Telangana 502313, India.ORCID 0000-0002-1489-7686
Siew-Kei LamCollege of Computing and Data Science, Nanyang Technological University, Singapore 639798, Singapore.ORCID 0000-0002-8346-2635
Narambhatla JanardhanDepartment of Mechanical Engineering, Chaitanya Bharati Institute of Technology, Gandipet, Hyderabad 500075, Telangana, India.ORCID 0000-0001-8591-7923
Penmetsa Subramanyam RajuDepartment of Electronics and Communication Engineering, B. V. Raju Institute of Technology, Medak District, Telangana 502313, India.ORCID 0000-0001-9445-8829
Dodde Hari KrishnaDepartment of Electronics and Communication Engineering, B. V. Raju Institute of Technology, Medak District, Telangana 502313, India.ORCID 0000-0002-4273-2045
Gaddam Divya VaniDepartment of Electronics and Communication Engineering, B. V. Raju Institute of Technology, Medak District, Telangana 502313, India.ORCID 0000-0002-5339-9233
Mudasar BashaDepartment of Electronics and Communication Engineering, B. V. Raju Institute of Technology, Medak District, Telangana 502313, India.

Funding

No grant is acknowledged in the PubMed record.

6 · The paper itself

Abstract

Gait symmetry analysis has emerged as an important tool in rehabilitation engineering and neurological disorder assessment, as it provides clinically relevant indicators of mobility impairment and gait abnormalities. The proposed framework integrates gait symmetry variability, statistical gait features and Dynamic Time Warping (DTW)-based temporal alignment to enhance robustness against gait variations and irregular walking patterns. A hybrid feature vector comprising DTW similarity scores, the hybrid gait symmetry index (GSI), and statistical gait descriptors was employed to classify gait patterns into five categories: normal, slow, medium, fast, and abnormal. The system was implemented as a wearable edge-computing platform using an NI myRIO device equipped with a tri-axial Inertial Measurement Unit (IMU) mounted on the subject's body. The onboard FPGA performs real-time signal preprocessing, GSI computation, feature extraction, constrained DTW matching, and gait classification using fixed-point streaming architectures and BRAM-based buffering. Meanwhile, the embedded ARM processor manages TCP/IP communication and transmits real-time gait information to a remote monitoring workstation via a WiFi interface for visualization and analysis. Operating at a clock frequency of 100 MHz, the complete architecture achieves an end-to-end processing latency of approximately 4 ms. The proposed FPGA-based implementation provides low-latency, energy-efficient, and real-time gait analysis, making it well suited for wearable rehabilitation systems, assistive healthcare devices, and continuous mobility monitoring applications.

Indexed as

GaitWearable Electronic DevicesAlgorithmsHumansSignal Processing, Computer-Assisteddynamic time warpingFPGAgait classificationgait symmetry indexreal-time systemswearable sensors

Identifiers

PMID42515528
PMCPMC13417462

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Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.