Design and Characterization of a Prototype Pixel Readout Chip for Synchrotron Single Photon-Counting Detectors with 50 µm Pitch and 20 e

Shijie Lu, Yifan Jiang, Tao Sun, Fuwan Gan, Tianyang Wang, Zhen Sheng

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Article in Sensors (Basel, Switzerland), 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

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5 · Who and what money

Authors and funding

6 authors.

Shijie LuState Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050, China.ORCID 0009-0009-6674-4866

Yifan JiangZhangjiang Laboratory, 100 Haike Road, Shanghai 201210, China.

Tao SunState Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050, China.ORCID 0009-0002-4303-8036

Fuwan GanState Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050, China.

Tianyang WangZhangjiang Laboratory, 100 Haike Road, Shanghai 201210, China.ORCID 0000-0002-8422-4778

Zhen ShengState Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050, China.

Funding

National Natural Science Foundation of China 22127901

6 · The paper itself

Abstract

As synchrotron radiation sources (SRSs) expand to cover a broader energy range, the demand for hybrid detectors with improved spatial and energy resolution is increasing. This paper presents the design and characterization of a prototype pixel readout ASIC featuring a small pixel size and low noise, developed for low energy soft X-ray applications. This chip adopts the single photon-counting (SPC) approach and each pixel consists of a front-end amplifier, a discriminator, a charge injection circuitry and a pair of 15-bit counters with associated logic. Fabricated in a 130 nm CMOS process, the chip integrates a 2 × 16 pixel matrix with a 50 µm ×50 µm pixel size. Measurement results indicate the maximum pixel equivalent noise charge (ENC) across the matrix is 20 e

Indexed as

ASIClow-energy detectionpixel detectorspixel readout chipsynchrotron radiation sourcesX-ray detectors

Identifiers

PMID42197800

DOI10.3390/s26102992

PMCPMC13211185

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