Unified Steep-Slope Switching and Non-Volatile Memory in a Complementarily Stabilized van der Waals Ferroelectric Transistor.

Sangmin Lee, Stanislav Sin, Cheolhwa Jang, Seongkweon Kang, Saeroonter Oh, Sungjoo Lee

Abstract read

In one paragraph

Article in Small (Weinheim an der Bergstrasse, Germany), 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

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0citing papers in PubMed

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The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.

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5 · Who and what money

Authors and funding

6 authors.

Sangmin LeeSKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon, South Korea.

Stanislav SinIndustrial Electronics Application Center, College of Information and Communication Engineering, Sungkyunkwan University, Suwon, South Korea.

Cheolhwa JangSKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon, South Korea.

Seongkweon KangDepartment of Semiconductor Convergence Engineering, Sungkyunkwan University, Suwon, South Korea.

Saeroonter OhDepartment of Semiconductor Convergence Engineering, Sungkyunkwan University, Suwon, South Korea.

Sungjoo LeeSKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon, South Korea.ORCID https://orcid.org/0000-0003-1284-3593

Funding

National Research Foundation of Korea 2022R1A2C3003068National Research Foundation of Korea RS-2023-00281048Samsung Electronics Co., Ltd. IO201215-08197-01

6 · The paper itself

Abstract

Achieving both steep-slope switching and robust non-volatile memory within a single transistor would enable new device concepts for low-power and logic-in-memory architectures. Conventional negative-capacitance FETs (NC-FETs) are designed to suppress ferroelectric bistability to enable hysteresis-free sub-thermionic switching, whereas ferroelectric FETs (Fe-FETs) exploit bistable polarization to provide non-volatile memory, leaving the two operating regimes largely separate in practice. Here, we report a van der Waals ferroelectric negative-capacitance transistor (FeNC-FET) that simultaneously realizes stabilized negative capacitance and intrinsic bistable polarization by employing a CIPS/h-BN/α-In

Indexed as

ferroelectriclogic‐in‐memorynegative capacitancesteep switchingtwo‐dimensional material

Identifiers

PMID42125838

DOI10.1002/smll.202514878

PMCPMC13325692

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Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.