ArticleLight, science & applications2026
A hybrid-frequency programmable synthetic-dimension simulator with rich coupling on a single chip.
Article in Light, science & applications, 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.
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19 authors.
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Abstract
High-performance photonic chips provide a powerful platform for analog computing, enabling the simulation of high-dimensional physical systems using low-dimensional devices with additional synthetic dimensions. The realization of large-scale complex simulations necessitates an architecture capable of rich coupling configurations (encompassing symmetric, asymmetric and long-range coupling schemes) which is also crucial for scaling up. Previous approaches rely on excessive physical components to introduce asymmetric coupling, however, are restricted in reconfiguring and scaling by the relatively complicated structures. Here, to solve this problem, we propose a hybrid-frequency synthetic-dimension simulator architecture that combines both intra-resonant and inter-resonant frequency-lattice sites, and experimentally demonstrate it using the thin-film lithium niobate (TFLN) photonic chip. Employing this hybrid programmable architecture, we are able to simulate both the regular and long-range coupled forms of diverse compound-lattice models, such as the Hall ladder, Creutz ladder (symmetric) and Su-Schrieffer-Heeger (SSH, asymmetric) model, on a single chip, simultaneously reducing the experimental requirements significantly. As results, the direct readout of the bandstructure of the SSH model is able to be achieved, to be distinguished from all previous works, and important phenomena such as spin-momentum locking, topological flat band and Aharonov-Bohm cage effect are also observed with lower experimental requirements. Furthermore, applications like piecewise-continuous optical frequency shifting can be enabled by cascading our devices. Our results offer promising insights for future large-scale complex on-chip simulators with rich couplings.
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