A superior ultrafast parallel BMAS architecture for high-resolution medical ultrasound imaging.

The proposed work aims to design, a novel ultrafast–parallel beamformer core for medical ultrasound imaging systems that is superior in performance compared to preceding beamformers. The architecture is aimed at achieving high-resolution images using 128 channels and at minimizing the hardware resources deployed for the architecture. There are many technological barriers in implementing an architecture that involves parallel receive beamforming which is the main critical block in an Ultrasound Imaging system. A superior algorithm Beam Multiply And Sum (BMAS) is used in receive beamforming to achieve high resolution images. The delay line architecture is visualized using 28-read 1-write multi ported memory. The hardware resources were optimized using external Static Random Access Memory (SRAM). The designed architecture was implemented using Verilog (RTL) coding, and the validation of the beamformer was performed on the Verasonics Vantage-64 Ultrasound Research Platform (URP). A high end custom built FPGA board that houses an XC7K410T Xilinx- Kintex 7 device was used for implementation. The complete imaging system was tested on an indigenously developed in-house ultrasound scanner prototype. The images received were compared against previous works and found to be superior as the resolution of the images improved from the previous delay and sum algorithm based version of the parallel beamformer core. The frame rate achieved by the system was 571 fps for a [Formula: see text] resolution with FOV of [Formula: see text]. It is concluded that the architecture is superior in terms of resolution and can be adapted for ultra-fast beamforming applications.