Enhancing bonding strength of the electroplated Cu pillars for semiconductor package by controlling grain orientation.

The Cu pillar bump, an electrode formed on a silicon chip, connects the devices inside a high bandwidth memory (HBM) package and is the most important interconnection affecting the electrical, thermal, and mechanical properties of advanced semiconductor package. Recently, the number of input/output (I/O) in HBM packages has been increasing and the fine pitch of Cu pillar is also becoming significantly smaller. Therefore, the bonding strength between electrodes is deteriorating due to the increase in interconnection density and fine pitch, which threatens the reliability of semiconductor packages. Also, the bonding strengths between Cu pillars, electrodes inside HBM package are greatly affected by the plating process, package temperature, interconnection technology, package process, as well as thermal expansion coefficient of materials, crystal structure and orientation of the material, and electrochemical reaction while using electronic packages. After Ti is sputtered as a bonding layer and Cu is sputtered as a seed layer onto the Si chip electrode, and finally, Cu pillar bumps (25 μm in diameter, 55 μm in pitch) are formed through electroplating. When the Cu seed layer is removed by etching, leaving only the electrode portion of chip, the Cu pillar bump is completed, but an undercut occurs at the interface of Cu pillar and Cu seed layer during the etching process of Cu seed layer. Electroplating process of Cu pillar bump was performed at conditions of 3.0, 8.0 and 13.0 A/dm