ReviewNano-micro letters2026
Self-Rectifying Memristors for Beyond-CMOS Computing: Mechanisms, Materials, and Integration Prospects.
Review in Nano-micro letters, 2026. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 1 paper.
What it found
Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.
The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.
The trial behind it
Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.
Neither the registry nor the abstract names a trial number. If this is a trial report, that itself is worth knowing.
Who cites it
1 citing paper in PubMed.
Corrections and comments
PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.
Authors and funding
11 authors.
Funding
No grant is acknowledged in the PubMed record.
Abstract
The deceleration of Moore's law and the energy-latency drawbacks of the von Neumann bottleneck have heightened the pursuit for beyond‑CMOS designs that integrate memory and compute. Self‑rectifying memristors (SRMs) have emerged as promising building blocks for high‑performance, low‑power systems by combining resistive switching with intrinsic diode-like behavior. Their unidirectional conduction inhibits sneak‑path currents in crossbar arrays devoid of external selectors, while nonlinear I-V characteristics, adjustable conductance states, low operating voltages, and rapid switching facilitate efficient vector-matrix operations, neuromorphic plasticity, and hardware security primitives. This review synthesizes the working mechanisms of SRMs, surveys material, and structural strategies and compares device metrics relevant to array‑scale deployment (rectification ratio, nonlinearity, endurance, retention, variability, and operating voltage). We assess SRM-enabled in-memory computing and neuromorphic applications, as well as security functions such as physical unclonable functions and reconfigurable cryptographic primitives. Integration pathways toward CMOS compatibility are analyzed, including back-end-of-line thermal budgets, uniformity, write disturb mitigation, and reliability. Finally, we outline key challenges and opportunities: materials/architecture co‑design, precision analog training, stochasticity control/exploitation, 3D stacking, and standardized benchmarking that can accelerate large‑scale SRM adoption. Through the use of specialized materials and structural optimization, SRMs are set to provide selector‑free, densely integrated, and energy‑efficient hardware for future information processing.
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Registered trials
Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.