Evidence map›Paper›PMID 41392316›Full record

ArticleScientific reports2025

Novel structures of chaos-based parallel multiple image encryption and FPGA implementation.

Thang Manh Hoang, Pham Quang Anh, Manh-Hai Hoang, Do Quang Tran, Safwan El Assad

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Article in Scientific reports, 2025. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

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5 authors.

Thang Manh HoangSchool of Electrical and Electronic Engineering, Hanoi University of Science and Technology, 1 Dai Co Viet, 11600, Hanoi, Vietnam. thang.hoangmanh@hust.edu.vn.
Pham Quang AnhSchool of Electrical and Electronic Engineering, Hanoi University of Science and Technology, 1 Dai Co Viet, 11600, Hanoi, Vietnam.
Manh-Hai HoangDepartment of Radiology and Diagnostic Imaging, Faculty of Medicine and Dentistry, University of Alberta, Edmonton, AB, T5K 0Z4, Canada.
Do Quang TranSchool of Electrical and Electronic Engineering, Hanoi University of Science and Technology, 1 Dai Co Viet, 11600, Hanoi, Vietnam.
Safwan El AssadNantes University, IETR Laboratory, Nantes, 44000, France.

Funding

Trường Đại học Bách Khoa Hà Nội T2023-TĐ-013
6 · The paper itself

Abstract

Image data has been generated massively by devices in medical imaging modalities, cameras, and even by artificial intelligence. Encryption is the powerful method to keep the image content confidential, in which an encryption algorithm must include the confusion and diffusion properties. For massive images, a efficient method of encryption must be chosen to meet the demands of encryption speed and confidentiality. So far, chaos-based image encryption has been an active topic of research because it is considered an effective method to remove the correlation in image data as well as to keep confidential by the involvement of chaotic system in the encryption process. Besides, multiple image encryption algorithms encrypt multiple images in parallel, and it provides highly efficient performance in term of speed if it is implemented on a parallel computing platform such as multiple core processing as well as digital hardware design. Chaos-based multiple image encryption is constructed by integrating a chaotic system into multiple image encryption. Recently, many algorithms of chaos-based multiple image encryption have been proposed, and they are proved to have high efficient in terms of both speed and confidentiality. However, all the existing algorithms of chaos-based multiple image encryption require images of the same size and of the same number of bits representing pixels. Further, they encrypt a cohort of plain images at the same time, and all ciphertext images of a cohort must also be decrypted at the same time. It means that if it does not allow to decrypt one or some selected ciphertext images from a cohort separately; and as a result, it wastes time and energy to decrypt unwanted images. In this paper, three novel structures of chaos-based multiple image encryption are proposed which overcome the drawbacks of existing algorithms. That is, the proposed cryptosystems accept cohort images of different sizes; pixels of images can be represented by different numbers of bits; and any selected ciphertext images from a cohort can be decrypted separately. The security is improved by using the session keys of image-content dependency. The proposed structures of multiple image encryption consist of permutation, substitution, and diffusion processes. The difference between three structures is the order of such processes. A perturbed chaotic map and a linear-feedback shift register are employed to generate pseudo-random bit sequences for session keys. The simulation results for the exemplar designs using the proposed structures show the effectiveness by means of the statistical analysis for the session keys using the NIST randomness test, information entropy, histogram, and correlation coefficients of adjacent pixels in ciphertext images, and security analysis by means of space and sensitivity of the secret key. The hardware implementation on the FPGA platform demonstrates the feasibility of the proposed structures by means of throughput and hardware efficiency.

Identifiers

PMID41392316
PMCPMC12783834

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