Evidence map›Paper›PMID 41120385›Full record

ArticleScientific reports2025

Fault tolerant and quality of service aware routing algorithm based on priority technique for scalable network on chip architectures.

Xiaomo Yu, Ling Tang, Jie Mi, Jiajia Liu, Long Long

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Article in Scientific reports, 2025. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

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1 · What the graph read from it

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2 · The registry

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4 · The record

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5 · Who and what money

Authors and funding

5 authors.

Xiaomo YuDepartment of Logistics Management and Engineering, Nanning Normal University, Nanning, 530001, Guangxi, China.ORCID https://orcid.org/0000-0002-7056-2362
Ling TangCollege of the Arts, Guangxi Minzu University, Nanning, 530001, Guangxi, China. tangling0312@163.com.
Jie MiDepartment of Logistics Management and Engineering, Nanning Normal University, Nanning, 530001, Guangxi, China.
Jiajia LiuDepartment of Logistics Management and Engineering, Nanning Normal University, Nanning, 530001, Guangxi, China.
Long LongCollege of Computer Science and Information Engineering, Nanning Normal University, Nanning, 530001, Guangxi, China.

Funding

No grant is acknowledged in the PubMed record.

6 · The paper itself

Abstract

Network on Chip (NoC) architectures are essential subsystems for on-chip communication. They use routers and simplified protocols modeled after public data networks to transport packets using complex routing algorithms from their source to their destination. Reliable communication can be severely hampered by component failures, such as malfunctioning routers or cables, which can interrupt packet transfer. Performance may be harmed by the narrow criteria used by traditional fault-tolerant routing algorithms to find reliable routes. In order to improve routing reliability and Quality of Service (QoS) in scalable NoC architectures, this paper suggests a novel, adaptive fault-tolerant routing algorithm that incorporates the Technique for Order of Preference by Similarity to Ideal Solution (TOPSIS), a multi-criteria decision-making technique. The suggested approach dynamically assesses and ranks alternate routes to choose the best ones, even when there are failures, by utilizing path length and density information from nearby nodes. On 8 × 8 meshes with 10% link failures, the approach reduces average delay by ~ 8-12% compared to EDAR and increases throughput by ~ 2-5% compared to EDAR; on application-driven traces, it reduces delay by ~ 5-15% at nearly equal throughput. It reduces energy per flit by around 15-20% compared to EDAR, improves throughput by about 3-4%, and lowers delay by about 8-10% under transient, thermal, and voltage disturbances. The two-stage decision core maintains the improvements on 16 × 16 meshes and reroutes locally in about 3-5 cycles without adding a critical-path cost. Additionally, the approach ensures scalability for large-scale NoC implementations by introducing low hardware overhead. The suggested algorithm is a viable answer for next-generation NoC designs, meeting the requirements of high-performance, dependable, and scalable on-chip communication systems thanks to its combination of fault tolerance, QoS awareness, and resource efficiency.

Indexed as

Adaptive routingFault-tolerant routingHardware overheadLatencyMulti-criteria decision-makingNetwork on chipQuality of serviceScalabilityThroughputTOPSIS

Identifiers

PMID41120385
PMCPMC12541066

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Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.