Evidence map›Paper›PMID 41018729›Full record

ArticleACS applied electronic materials2025

Fast and Cost-Effective Fabrication of Ultrathin (20 μm) Silicon Substrates by Melt-Spinning.

Hyung Woo Choi, Dhanesh Chandra, Ghassan Jabbour

Abstract read
In one paragraph

Article in ACS applied electronic materials, 2025. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

0numbers the graph read from it
0cells of the map it votes in
0citing papers in PubMed
–field-weighted citation impact
1 · What the graph read from it

What it found

Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.

The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.

2 · The registry

The trial behind it

Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.

Neither the registry nor the abstract names a trial number. If this is a trial report, that itself is worth knowing.

3 · Its place in the literature

Who cites it

0 citing papers in PubMed.

No citing paper in PubMed yet.

4 · The record

Corrections and comments

PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.

5 · Who and what money

Authors and funding

3 authors.

Hyung Woo ChoiSchool of Electrical Engineering and Computer Science, University of Ottawa, 800 King Edward Avenue, Ottawa, Ontario K1N 6N5, Canada.ORCID https://orcid.org/0000-0002-5460-5860
Dhanesh ChandraDepartment of Chemical and Materials Engineering, University of Nevada, Reno 89557, United States.
Ghassan JabbourSchool of Electrical Engineering and Computer Science, University of Ottawa, 800 King Edward Avenue, Ottawa, Ontario K1N 6N5, Canada.

Funding

No grant is acknowledged in the PubMed record.

6 · The paper itself

Abstract

Thin silicon wafer fabrication is a crucial aspect of semiconductor manufacturing, offering enhanced material yield and reduced fabrication costs. Traditional techniques for producing thin silicon substrates often involve the use of supporting substrates for bonding/debonding or intricate processes, such as etching and thinning. In this study, we present the fabrication of an ultrathin polycrystalline silicon substrate utilizing a melt-spinner approach. Our approach has yielded a substrate of unprecedented dimensions, characterized by a width of 1 cm, a length of 5 cm, and an approximate thickness of 20 μm, and fabricated at a speed of 35 m s

Indexed as

melt-spinnerpolycrystallinesiliconsolar cellsultrathin

Identifiers

PMID41018729
PMCPMC12462756

What OpenQuestion holds

Textmetadata
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Registered trials

None linked

Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.