Evidence map›Paper›PMID 40502990›Full record

ArticleMethodsX2025

Design methodology for low-power, low-voltage inductor-less Chua's chaotic oscillator.

Chandan Kumar Choubey, Amit Gupta, Aruna Pathak

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Article in MethodsX, 2025. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 1 paper.

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1citing papers in PubMed
–field-weighted citation impact
1 · What the graph read from it

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3 · Its place in the literature

Who cites it

1 citing paper in PubMed.

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4 · The record

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5 · Who and what money

Authors and funding

3 authors.

Chandan Kumar ChoubeySymbiosis Institute of Technology, Pune Campus, Symbiosis International (Deemed University), Pune, Maharashtra, India.
Amit GuptaDepartment of Information Technology, Indian Institute of Information Technology, Bhopal, India.
Aruna PathakDepartment of Electronics and Communication Engineering, Government Engineering College, Bharatpur, Rajasthan, India.

Funding

No grant is acknowledged in the PubMed record.

6 · The paper itself

Abstract

This paper describes the design and modeling of a low-power, low-voltage Chua's chaotic oscillator using Dynamic Threshold Metal Oxide Semiconductor (DTMOS) technology. The primary active block used for this design is the DTMOS-based Dual-X Second-Generation Current Conveyor (DXCCII), which is an efficient current-mode active block that dramatically improves circuit performance and efficiency. The nonlinear active element of the Chua circuit, also called the Chua diode, is built using a single DXCCII block. Also, a synthetic inductor using only one DXCCII is used instead of a real inductor is used, which eases the fabrication process. As a result, the complete circuit requires only two DXCCIIs, allowing for an inductor-free design. The suggested circuits, including the Chua diode and Chua circuits, are simulated in PSPICE utilizing TSMC 180 nm CMOS technology. A DTMOS implementation of the DXCCII has been realized and utilized in the simulation with 180 nm CMOS technology. The slopes and the breakpoints of the nonlinear resistors are obtained from the V-I characteristics of Chua's diode, which confirms the theoretical and mathematical predictions. Attractors and chaotic waveforms obtained in the simulation validate the proposed DTMOS-based Chua chaotic oscillator. The circuit uses a bias voltage of ±0.2 V and consumes only 1.58 µW.•A low-power, low-voltage design of Chua's chaotic oscillator using DTMOS technology has been proposed in this paper.•With only two DTMOS-based DXCCIIs, an inductor-less design has been implemented.•The proposed circuit uses a bias voltage of ±0.2 V and consumes only 1.58 µW.

Indexed as

Chaotic signalChua’s circuitDesign methodology for low-power, low-voltage, inductorless Chua's chaotic oscillator using DTMOS-based DXCCII.DTMOS TechnologyDXCCIILow power circuitNon-linear circuit

Identifiers

PMID40502990
PMCPMC12155962

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Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.