Hardware-Efficient Phase Demodulation for Digital

This paper presents hardware-efficient phase demodulation schemes for FPGA-based digital phase-sensitive optical time-domain reflectometry (ϕ-OTDR) receivers. We first derive a signal model for the heterodyne ϕ-OTDR frontend, then propose and analyze three demodulation methods: (1) a baseband reconstruction approach via zero-IF downconversion, (2) an analytic signal generation technique using the Hilbert transform (HT), and (3) a wavelet transform (WT)-based alternative for analytic signal extraction. Algorithm-hardware co-design implementations are detailed for both RFSoC and conventional FPGA platforms, with resource utilization comparisons. Additionally, we introduce an incremental DC-rejected phase unwrapper (IDRPU) algorithm to jointly address phase unwrapping and DC drift removal, minimizing computational overhead while avoiding numerical overflow. Experiments on simulated and real-world ϕ-OTDR data show that the HT method matches the performance of zero-IF demodulation with simpler hardware and lower resource usage, while the WT method offers enhanced robustness against fading noise (3.35-22.47 dB SNR improvement in fading conditions), albeit with slightly ambiguous event boundaries and higher hardware utilization. These findings provide actionable insights for demodulator design in distributed acoustic sensing (DAS) applications and advance the development of single-chip DAS systems.