GESC-YOLO: Improved Lightweight Printed Circuit Board Defect Detection Based Algorithm.

Printed circuit boards (PCBs) are an indispensable part of electronic products, and their quality is crucial to the operational integrity and functional reliability of these products. Currently, existing PCB defect detection models are beset with issues such as excessive model size and parameter complexity, rendering them ill-equipped to meet the requirements for lightweight deployment on mobile devices. To address this challenge, this paper proposes a lightweight detection model, GESC-YOLO, developed through modifications to the YOLOv8n architecture. First, a new lightweight module, C2f-GE, is designed to replace the C2f module of the backbone network, which effectively reduces the computational parameters, and at the same time increases the number of channels of the feature map to enhance the feature extraction capability of the model. Second, the neck network employs the lightweight hybrid convolution GSConv. By integrating it with the VoV-GSCSP module, the Slim-neck structure is constructed. This approach not only guarantees detection precision but also enables model lightweighting and a reduction in the number of parameters. Finally, the coordinate attention is introduced into the neck network to decompose the channel attention and aggregate the features, which can effectively retain the spatial information and thus improve the detection and localization accuracy of tiny defects (defect area less than 1% of total image area) in PCB defect images. Experimental results demonstrate that, in contrast to the original YOLOv8n model, the GESC-YOLO algorithm boosts the mean Average Precision (mAP) of PCB surface defects by 0.4%, reaching 99%. Simultaneously, the model size is reduced by 25.4%, the parameter count is cut down by 28.6%, and the computational resource consumption is reduced by 26.8%. This successfully achieves the harmonization of detection precision and model lightweighting.