A wafer-level sealed silicon cavity microacoustic platform for radio frequency integration.

Jiashuai Xu, Zijun Ren, Fangsheng Qian, Junyan Zheng, Yansong Yang

Abstract read

In one paragraph

Article in Microsystems & nanoengineering, 2025. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

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1 · What the graph read from it

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Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.

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2 · The registry

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4 · The record

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5 · Who and what money

Authors and funding

5 authors.

Jiashuai XuDepartment of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Hong Kong, China.

Zijun RenDepartment of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Hong Kong, China.

Fangsheng QianDepartment of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Hong Kong, China.

Junyan ZhengDepartment of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Hong Kong, China.

Yansong YangDepartment of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Hong Kong, China. eeyyang@ust.hk.ORCID http://orcid.org/0000-0003-2325-3505

Funding

National Natural Science Foundation of China (National Science Foundation of China) 62304193Research Grants Council, University Grants Committee (RGC, UGC) 26202122

6 · The paper itself

Abstract

This study presents a wafer-level sealed silicon cavity (SSC) microacoustic integration platform to address the limitations in the cavity Silicon-on-Insulator (C-SOI) wafers for the 5G/6G wireless communication system. The proposed SSC platform features an extremely smooth suspended membrane with adjustable thickness, flexible cavity shapes with high density, self-formed acoustic wave confinement steps, stable temperature coefficient of frequency (TCF), and highly integrated compatibility with complementary metal-oxide semiconductor (CMOS). A surface smoothing method based on wet oxidation for SSC wafers is presented, which achieves a root mean square (RMS) roughness on the cavity surface of 1.5 nm for the first time. Based on the presented SSC platform, an Al

Identifiers

PMID40419491

DOI10.1038/s41378-025-00958-8

PMCPMC12106694

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LicenceCC BY-NC-ND

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Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.