ArticleIEEE transactions on biomedical circuits and systems2025
An Energy-Efficient and Artifact-Resilient ASIC for Simultaneous Neural Recording and Optogenetic Stimulation.
Article in IEEE transactions on biomedical circuits and systems, 2025. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 2 papers.
What it found
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The trial behind it
Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.
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Who cites it
2 citing papers in PubMed.
- Low-power analog and mixed-signal circuit techniques for next-generation miniature implantable neural interface systems.Biomedical engineering letters · 2026Review
- An Implantable, Ultralow Distortion Bioelectronic Interface Integrating Light-Emitting Diodes and Graphene Field-Effect Transistors.ACS nano · 2025Article
Corrections and comments
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Authors and funding
6 authors.
Funding
Abstract
This paper presents an application-specific integrated circuit (ASIC) fabricated using the CMOS 180 nm process to perform simultaneous neural recording and optogenetic stimulation. To perform effective optogenetic stimulation, the ASIC features an advanced switched-capacitor-based stimulation (SCS) driver, called voltage-boosting SCS (VB-SCS). The VB-SCS can drive LED with large current pulses up to 8 mA while reducing the required supply voltage by half, facilitating wireless power reception. To prevent saturation from stimulation-induced artifacts, the ASIC integrates a direct digitizing recording frontend with a high-resolution delta-sigma (ΔΣ) analog-to-digital converter (ADC) that directly digitizes neural signals with a large input dynamic range. This ΔΣ ADC involves a Gm-C integrator followed by a noise-shaping (NS) successive approximation register (SAR) quantizer. Measurement results indicate that this ΔΣ ADC-based direct digitizing frontend can tolerate large artifacts up to 300 mV
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Registered trials
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