ArticleNature communications2024
Fast and robust analog in-memory deep neural network training.
Article in Nature communications, 2024. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 5 papers.
What it found
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The trial behind it
Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.
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Who cites it
5 citing papers in PubMed.
- Implementation of offset corrected AGAD algorithm on 130-nm CMOS technology-based RRAM array for analog neural network training.Science advances · 2026Article
- Trainable neuromorphic spintronic hardware Via analog finite-difference gradient methods.Nature communications · 2026Article
- Update Disturbance-Resilient Analog ReRAM Crossbar Arrays for In-Memory Deep Learning Accelerators.Advanced science (Weinheim, Baden-Wurttemberg, Germany) · 2026Article
- Error-aware probabilistic training for memristive neural networks.Nature communications · 2025Article
- Disturbance-Aware On-Chip Training with Mitigation Schemes for Massively Parallel Computing in Analog Deep Learning Accelerator.Advanced science (Weinheim, Baden-Wurttemberg, Germany) · 2025Article
Corrections and comments
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Authors and funding
4 authors.
Funding
No grant is acknowledged in the PubMed record.
Abstract
Analog in-memory computing is a promising future technology for efficiently accelerating deep learning networks. While using in-memory computing to accelerate the inference phase has been studied extensively, accelerating the training phase has received less attention, despite its arguably much larger compute demand to accelerate. While some analog in-memory training algorithms have been suggested, they either invoke significant amount of auxiliary digital compute-accumulating the gradient in digital floating point precision, limiting the potential speed-up-or suffer from the need for near perfectly programming reference conductance values to establish an algorithmic zero point. Here, we propose two improved algorithms for in-memory training, that retain the same fast runtime complexity while resolving the requirement of a precise zero point. We further investigate the limits of the algorithms in terms of conductance noise, symmetry, retention, and endurance which narrow down possible device material choices adequate for fast and robust in-memory deep neural network training.
Identifiers
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Registered trials
Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.