ArticleScientific reports2024
3SAT on an all-to-all-connected CMOS Ising solver chip.
Article in Scientific reports, 2024. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 5 papers.
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Who cites it
5 citing papers in PubMed.
- Towards higher order oscillatory Ising machines.Scientific reports · 2026Article
- Influence maximization under the linear threshold model on a CMOS Ising solver.Scientific reports · 2025Article
- DROID: discrete-time simulation for ring-oscillator-based Ising design.Scientific reports · 2025Article
- Overcoming quadratic hardware scaling for a fully connected digital oscillatory neural network.Frontiers in neuroscience · 2025Article
- Computing with oscillators from theoretical underpinnings to applications and demonstrators.Npj unconventional computing · 2024Review
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Authors and funding
10 authors.
Funding
Abstract
This work solves 3SAT, a classical NP-complete problem, on a CMOS-based Ising hardware chip with all-to-all connectivity. The paper addresses practical issues in going from algorithms to hardware. It considers several degrees of freedom in mapping the 3SAT problem to the chip-using multiple Ising formulations for 3SAT; exploring multiple strategies for decomposing large problems into subproblems that can be accommodated on the Ising chip; and executing a sequence of these subproblems on CMOS hardware to obtain the solution to the larger problem. These are evaluated within a software framework, and the results are used to identify the most promising formulations and decomposition techniques. These best approaches are then mapped to the all-to-all hardware, and the performance of 3SAT is evaluated on the chip. Experimental data shows that the deployed decomposition and mapping strategies impact SAT solution quality: without our methods, the CMOS hardware cannot achieve 3SAT solutions on SATLIB benchmarks. Under the assumption of some hardware improvements, our chip-based 3SAT solver demonstrates a remarkable 250
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Registered trials
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