ArticleMicrosystems & nanoengineering2023
Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis.
Article in Microsystems & nanoengineering, 2023. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 2 papers.
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The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.
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Who cites it
2 citing papers in PubMed, 9 citations in OpenAlex.
- Spatiotemporal Thermal Modulation and Patterning using a Programmable 1024 Element Microheater Array.Advanced science (Weinheim, Baden-Wurttemberg, Germany) · 2026Article
- Multiphysics Optical-Thermal and Mechanical Modeling of a CMOS-SOI-MEMS Infrared Sensor with Metasurface Absorber.Sensors (Basel, Switzerland) · 2025Article
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Authors and funding
4 authors at 1 institution in 1 country.
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No grant is acknowledged in the PubMed record.
Abstract
Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement is the development of necessary post-processing steps on CMOS chips for fabricating CMOS-MEMS polysilicon heaters that can locally generate the required CNT synthesis temperatures (~650-900 °C). In our post-CMOS processing, a subtractive fabrication technique is used for micromachining the polysilicon heaters, where the passivation layers in CMOS are used as masks to protect the electronics. For dielectric etching, it is necessary to achieve high selectivity, uniform etching and a good etch rate to fully expose the polysilicon layers without causing damage. We achieved successful post-CMOS processing by developing two-step reactive ion etching (RIE) of the SiO
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