Evidence map›Paper›PMID 37512682›Full record

ArticleMicromachines2023

RisCO2: Implementation and Performance Evaluation of RISC-V Processors for Low-Power CO

Ricardo Núñez-Prieto, David Castells-Rufas, Lluís Terés-Terés

Open access · goldAbstract read
In one paragraph

Article in Micromachines, 2023. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

0numbers the graph read from it
0cells of the map it votes in
0citing papers in PubMed
0.8field-weighted citation impact, top 29% of its field
1 · What the graph read from it

What it found

Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.

The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.

2 · The registry

The trial behind it

Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.

Neither the registry nor the abstract names a trial number. If this is a trial report, that itself is worth knowing.

3 · Its place in the literature

Who cites it

0 citing papers in PubMed, 6 citations in OpenAlex.

No citing paper in PubMed yet.

4 · The record

Corrections and comments

PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.

5 · Who and what money

Authors and funding

3 authors at 1 institution in 1 country.

Ricardo Núñez-PrietoBarcelona Supercomputing Center (BSC), 08034 Barcelona, Spain.ORCID 0000-0002-6294-1928
David Castells-RufasBarcelona Supercomputing Center (BSC), 08034 Barcelona, Spain.ORCID 0000-0002-7181-9705
Lluís Terés-TerésMicroelectronics & Electronic Systems Department, Universitat Autònoma de Barcelona (UAB), 08193 Cerdanyola del Vallès, Spain.ORCID 0000-0002-9263-411X
Universitat Autònoma de Barcelona · ES

Funding

Catalan Government (industrial Ph.D. programme) 2019-DI-056Spanish Ministry of Science, Innovation, and Universities RTI2018-095209-B-C22
6 · The paper itself

Abstract

In the field of embedded systems, energy efficiency is a critical requirement, particularly for battery-powered devices. RISC-V processors have gained popularity due to their flexibility and open-source nature, making them an attractive choice for embedded applications. However, not all RISC-V processors are equally energy-efficient, and evaluating their performance in specific use cases is essential. This paper presents RisCO2, an RISC-V implementation optimized for energy efficiency. It evaluates its performance compared to other RISC-V processors in terms of resource utilization and energy consumption in a signal processing application for nondispersive infrared (NDIR) CO

Indexed as

energy efficiencyFPGANDIR CO2 sensorspower consumptionPULPinoRISC-Vsignal demodulation

Identifiers

PMID37512682
PMCPMC10385369
OpenAlexW4383262909

What OpenQuestion holds

Textmetadata
LicenceCC BY
Read underepoch 390

Registered trials

None linked

Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.