ArticleNature communications2023
A reconfigurable binary/ternary logic conversion-in-memory based on drain-aligned floating-gate heterojunction transistors.
Article in Nature communications, 2023. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 10 papers.
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Who cites it
10 citing papers in PubMed.
- Re-Thinking Electronic Circuit Design Through Emerging Reconfigurable Field Effect Transistors.Advanced science (Weinheim, Baden-Wurttemberg, Germany) · 2026Review
- A light-driven multi-state heterojunction transistor for optoelectronic ternary logic circuits.Nature communications · 2026Article
- Transistor-Level Activation Functions via Two-Gate Designs: From Analog Sigmoid and Gaussian Control to Real-Time Hardware Demonstrations.Advanced materials (Deerfield Beach, Fla.) · 2026Article
- Heterojunction-Driven Stochasticity: Bi-Heterojunction Noise-Enhanced Negative Transconductance Transistor in Image Generation.Advanced materials (Deerfield Beach, Fla.) · 2025Article
- Beyond the Silicon Plateau: A Convergence of Novel Materials for Transistor Evolution.Nano-micro letters · 2025Review
- Reconfigurable binary and ternary logic devices enabling logic state modulation.Nature communications · 2025Article
- Article
- High-performance ternary logic circuits and neural networks based on carbon nanotube source-gating transistors.Science advances · 2025Article
- Multifunctional Reconfigurable Operations in an Ultra-Scaled Ferroelectric Negative Transconductance Transistor.ACS nano · 2024Article
- Binary and ternary logic-in-memory using nanosheet feedback field-effect transistors with triple-gated structure.Scientific reports · 2024Article
Corrections and comments
PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.
Authors and funding
6 authors.
Funding
Abstract
A new type of heterojunction non-volatile memory transistor (H-MTR) has been developed, in which the negative transconductance (NTC) characteristics can be controlled systematically by a drain-aligned floating gate. In the H-MTR, a reliable transition between N-shaped transfer curves with distinct NTC and monolithically current-increasing transfer curves without apparent NTC can be accomplished through programming operation. Based on the H-MTR, a binary/ternary reconfigurable logic inverter (R-inverter) has been successfully implemented, which showed an unprecedentedly high static noise margin of 85% for binary logic operation and 59% for ternary logic operation, as well as long-term stability and outstanding cycle endurance. Furthermore, a ternary/binary dynamic logic conversion-in-memory has been demonstrated using a serially-connected R-inverter chain. The ternary/binary dynamic logic conversion-in-memory could generate three different output logic sequences for the same input signal in three logic levels, which is a new logic computing method that has never been presented before.
Identifiers
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Registered trials
Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.