ArticleRecent patents on nanotechnology2024
Investigations on Cylindrical Surrounding Double-gate (CSDG) Mosfet using AL
Article in Recent patents on nanotechnology, 2024. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 1 paper.
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Who cites it
1 citing paper in PubMed.
- Analysis of Lanthanum Oxide Based Double-Gate SOI MOSFET using Monte-Carlo Process.Recent patents on nanotechnology · 2025Article
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Authors and funding
2 authors.
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No grant is acknowledged in the PubMed record.
Abstract
BACKGROUND/
introductionThe Cylindrical Surrounding Double-Gate MOSFET has been designed using Aluminium Gallium Arsenide in its arbitrary alloy form alongside Indium Phosphide with Lanthanum Dioxide as a high-ƙ dielectric material.
objectiveTo conduct research on the novel application of Al
methodsThe usage of 2 Dimensional Electron Gas has been outstanding in recent years to help the electron buildup and charge carrier accumulation in the MOSFETs regime. Device simulation used for the smart integral systems is an electronic simulator that uses the physical robustness and the mathematical modeling of semiconductor heterostructures. In this research work, the fabrication method of Cylindrical Surrounding Double Gate MOSFET has been discussed and realized. The scaling down of the devices is essential to reduce the area of the chip and heat generation. By using these cylindrical structures, the area of contact with the circuit platform is reduced since the cylinder can be laid down horizontally.
resultsThe coulomb scattering rate is observed to be 18.3 % lower than the drain terminal when compared to the source terminal. Also, at x = 0.125 nm, the rate is 23.9 %, which makes it the lowest along the length of the channel; at x = 1 nm, the rate is 1.4 % lesser than that of the drain terminal. A 1.4 A/mm
conclusionThe findings of this study reveal that the proposed cylindrical structures transistor, compared to the conventional transistor, not only occupies a smaller area but also demonstrates enhanced efficiency in RF applications. These results suggest the potential for patentable innovations in the field of transistor design and fabrication, offering opportunities for intellectual property development and commercialization.
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Registered trials
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