ArticleIEEE transactions on biomedical circuits and systems2022
A Power-Efficient Brain-Machine Interface System With a Sub-mw Feature Extraction and Decoding ASIC Demonstrated in Nonhuman Primates.
Article in IEEE transactions on biomedical circuits and systems, 2022. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 8 papers.
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8 citing papers in PubMed, 27 citations in OpenAlex.
- Low-power differencing feature extracts spiking-band activities for high-performance intracortical brain-computer interfaces.Communications biology · 2026Article
- NeuroGator: A Low-Power Gating System for Asynchronous BCI Based on LFP Brain State Estimation.Brain sciences · 2026Article
- Bionic vision technologies: progress and perspectives on retinal prostheses and optogenetics for the treatment of advanced retinal degeneration.Frontiers in medical technology · 2026Review
- Real-time, neural signal processing for high-density brain-implantable devices.Bioelectronic medicine · 2025Review
- Comparison metrics and power trade-offs for BCI motor decoding circuit design.Frontiers in human neuroscience · 2025Review
- Reducing power requirements for high-accuracy decoding in iBCIs.Journal of neural engineering · 2024Article
- Brain-computer interfaces for neuropsychiatric disorders.Nature reviews bioengineering · 2024Article
- Circuit-Level Modeling and Simulation of Wireless Sensing and Energy Harvesting With Hybrid Magnetoelectric Antennas for Implantable Neural Devices.IEEE open journal of circuits and systems · 2023Article
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Authors and funding
10 authors at 1 institution in 1 country.
Funding
Abstract
Intracortical brain-machine interfaces have shown promise for restoring function to people with paralysis, but their translation to portable and implantable devices is hindered by their high power consumption. Recent devices have drastically reduced power consumption compared to standard experimental brain-machine interfaces, but still require wired or wireless connections to computing hardware for feature extraction and inference. Here, we introduce a Neural Recording And Decoding (NeuRAD) application specific integrated circuit (ASIC) in 180 nm CMOS that can extract neural spiking features and predict two-dimensional behaviors in real-time. To reduce amplifier and feature extraction power consumption, the NeuRAD has a hardware accelerator for extracting spiking band power (SBP) from intracortical spiking signals and includes an M0 processor with a fixed-point Matrix Acceleration Unit (MAU) for efficient and flexible decoding. We validated device functionality by recording SBP from a nonhuman primate implanted with a Utah microelectrode array and predicting the one- and two-dimensional finger movements the monkey was attempting to execute in closed-loop using a steady-state Kalman filter (SSKF). Using the NeuRAD's real-time predictions, the monkey achieved 100% success rate and 0.82 s mean target acquisition time to control one-dimensional finger movements using just 581 μW. To predict two-dimensional finger movements, the NeuRAD consumed 588 μW to enable the monkey to achieve a 96% success rate and 2.4 s mean acquisition time. By employing SBP, ASIC brain-machine interfaces can close the gap to enable fully implantable therapies for people with paralysis.
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