Evidence map›Paper›PMID 35407161›Full record

ReviewNanomaterials (Basel, Switzerland)2022

Functional Devices from Bottom-Up Silicon Nanowires: A Review.

Tabassom Arjmand, Maxime Legallais, Thi Thu Thuy Nguyen, Pauline Serre, Monica Vallejo-Perez, Fanny Morisot, Bassem Salem, Céline Ternon

Abstract readReview
In one paragraph

Review in Nanomaterials (Basel, Switzerland), 2022. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 12 papers.

0numbers the graph read from it
0cells of the map it votes in
12citing papers in PubMed
–field-weighted citation impact
1 · What the graph read from it

What it found

Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.

The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.

2 · The registry

The trial behind it

Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.

Neither the registry nor the abstract names a trial number. If this is a trial report, that itself is worth knowing.

3 · Its place in the literature

Who cites it

12 citing papers in PubMed.

  1. Article
  2. Article
  3. Article
  4. Article
  5. Review
  6. Review
  7. Review
  8. Article
  9. Article
  10. Article
  11. Article
  12. Silica- and Silicon-Based Nanostructures.Nanomaterials (Basel, Switzerland) · 2022
    Article
4 · The record

Corrections and comments

PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.

5 · Who and what money

Authors and funding

8 authors.

Tabassom ArjmandUniv. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), LMGP, F-38000 Grenoble, France.
Maxime LegallaisUniv. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), LMGP, F-38000 Grenoble, France.
Thi Thu Thuy NguyenUniv. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), LMGP, F-38000 Grenoble, France.
Pauline SerreUniv. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), LMGP, F-38000 Grenoble, France.
Monica Vallejo-PerezUniv. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), LMGP, F-38000 Grenoble, France.
Fanny MorisotUniv. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), LMGP, F-38000 Grenoble, France.
Bassem SalemUniv. Grenoble Alpes, CNRS, CEA/LETI-Minatec, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), LTM, F-38000 Grenoble, France.ORCID 0000-0001-8038-3205
Céline TernonUniv. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), LMGP, F-38000 Grenoble, France.ORCID 0000-0001-8890-4239

Funding

Agence Nationale de la Recherche ERA-NET-JTC2016EU H2020 RIA 688329
6 · The paper itself

Abstract

This paper summarizes some of the essential aspects for the fabrication of functional devices from bottom-up silicon nanowires. In a first part, the different ways of exploiting nanowires in functional devices, from single nanowires to large assemblies of nanowires such as nanonets (two-dimensional arrays of randomly oriented nanowires), are briefly reviewed. Subsequently, the main properties of nanowires are discussed followed by those of nanonets that benefit from the large numbers of nanowires involved. After describing the main techniques used for the growth of nanowires, in the context of functional device fabrication, the different techniques used for nanowire manipulation are largely presented as they constitute one of the first fundamental steps that allows the nanowire positioning necessary to start the integration process. The advantages and disadvantages of each of these manipulation techniques are discussed. Then, the main families of nanowire-based transistors are presented; their most common integration routes and the electrical performance of the resulting devices are also presented and compared in order to highlight the relevance of these different geometries. Because they can be bottlenecks, the key technological elements necessary for the integration of silicon nanowires are detailed: the sintering technique, the importance of surface and interface engineering, and the key role of silicidation for good device performance. Finally the main application areas for these silicon nanowire devices are reviewed.

Indexed as

integration processnanonetsnanowiressilicontransistor

Identifiers

PMID35407161
PMCPMC9000537

What OpenQuestion holds

Textmetadata
LicenceCC BY
Read underepoch 390

Registered trials

None linked

Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the OpenQuestion graph.