ArticleSensors (Basel, Switzerland)2022
A Low Temperature Coefficient Time-to-Digital Converter with 1.3 ps Resolution Implemented in a 28 nm FPGA.
Article in Sensors (Basel, Switzerland), 2022. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 7 papers.
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Who cites it
7 citing papers in PubMed.
- Application and Comparison of FPGA-Based Carry Chain TDC and DDMTD Schemes in High-Precision Time Synchronization.Sensors (Basel, Switzerland) · 2026Article
- Implementation of a FPGA-Based Time-to-Digital Converter Utilizing Opposite-Transition Propagation and Virtual Bin Method.IEEE transactions on radiation and plasma medical sciences · 2025Article
- Cross-Detection for Bubble-free Thermometer Codes and Dual-Side Monitoring for FPGA-Based High-Accuracy and High-Precision Time-to-Digital Converters.IEEE transactions on instrumentation and measurement · 2025Article
- Low-Resource Time-to-Digital Converters for Field Programmable Gate Arrays: A Review.Sensors (Basel, Switzerland) · 2024Article
- A Study on the Effect of Temperature Variations on FPGA-Based Multi-Channel Time-to-Digital Converters.Sensors (Basel, Switzerland) · 2023Article
- Calibration Methods for Time-to-Digital Converters.Sensors (Basel, Switzerland) · 2023Article
- A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components.Sensors (Basel, Switzerland) · 2022Article
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Authors and funding
6 authors.
Funding
Abstract
Time-to-digital converter (TDC) is the key technology to realize accurate time delay measurement in high-precision optical fiber time-frequency transmission and synchronization, optical sensing and many scientific applications. The performance of FPGA-TDC based on the carry chain is sensitive to the operating temperature. This paper presents a parallel multichain cross segmentation method, without multitime measurements, which merges multichain into an equivalent chain, achieving low temperature coefficient and maintaining high precision. The equivalent chain breaks the limit of the intrinsic cell delay of a single carry chain, improves the precision and reduces the impact of temperature variation significantly. A two-channel TDC based on parallel multichain cross segmentation method is implemented in a 28 nm fabrication process Kintex-7 FPGA. The results show that the performance of TDC is improved with the increase of the number of chains. The 10-chain TDC with 1.3 ps resolution, 4.6 ps single-shot precision performs much better than the plain TDC with 11.4 ps resolution, 8.7 ps single-shot precision. The resolution is stable with 0.0002 ps/°C temperature coefficient under an operating temperature range from 25 °C to 70 °C. Moreover, the proposed method reduces the complexity of the circuit and the resource usage.
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Registered trials
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