ArticleFrontiers in neuroscience2021
Low-Cutoff Frequency Reduction in Neural Amplifiers: Analysis and Implementation in CMOS 65 nm.
Article in Frontiers in neuroscience, 2021. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 2 papers.
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2 citing papers in PubMed.
- Novel Tunable Pseudoresistor-Based Chopper-Stabilized Capacitively Coupled Amplifier and Its Machine Learning-Based Application.Micromachines · 2025Article
- Versatile On-Chip Programming of Circuit Hardware for Wearable and Implantable Biomedical Microdevices.Advanced science (Weinheim, Baden-Wurttemberg, Germany) · 2023Article
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4 authors.
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Abstract
Scaling down technology demotes the parameters of AC-coupled neural amplifiers, such as increasing the low-cutoff frequency due to the short-channel effects. To improve the low-cutoff frequency, one solution is to increase the feedback capacitors' value. This solution is not desirable, as the input capacitors have to be increased to maintain the same gain, which increases the area and decreases the input impedance of the neural amplifier. We analytically analyze the small-signal behavior of the neural amplifier and prove that the main reason for the increase of the low-cutoff frequency in advanced CMOS technologies is the reduction of the input resistance of the operational transconductance amplifier (OTA). We also show that the reduction of the input resistance of the OTA is due to the increase in the gate oxide leakage in the input transistors. In this paper, we explore this fact and propose two solutions to reduce the low-cutoff frequency without increasing the value of the feedback capacitor. The first solution is performed by only simulation and is called cross-coupled positive feedback that uses pseudoresistors to provide a negative resistance to increase the input resistance of the OTA. As an advantage, only standard CMOS transistors are used in this method. Simulation results show that a low-cutoff frequency of 1.5 Hz is achieved while the midband gain is 30.4 dB at 1 V. In addition, the power consumption is 0.6 μW. In the second method, we utilize thick-oxide MOS transistors in the input differential pair of the OTA. We designed and fabricated the second method in the 65 nm TSMC CMOS process. Measured results are obtained by
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