ArticleFrontiers in neuroscience2015
Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS.
Article in Frontiers in neuroscience, 2015. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 10 papers.
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Who cites it
10 citing papers in PubMed.
- Modeling homosynaptic and heterosynaptic plasticity with a single neuromemristive synapse.Journal of advanced research · 2026Article
- Review
- Plasticity and Adaptation in Neuromorphic Biohybrid Systems.iScience · 2020Review
- A Biohybrid Setup for Coupling Biological and Neuromorphic Neural Networks.Frontiers in neuroscience · 2019Article
- Memory-Efficient Deep Learning on a SpiNNaker 2 Prototype.Frontiers in neuroscience · 2018Article
- Pulse Shape and Timing Dependence on the Spike-Timing Dependent Plasticity Response of Ion-Conducting Memristors as Synapses.Frontiers in bioengineering and biotechnology · 2016Article
- Leaky Integrate-and-Fire Neuron Circuit Based on Floating-Gate Integrator.Frontiers in neuroscience · 2016Article
- Single pairing spike-timing dependent plasticity in BiFeO3 memristors with a time window of 25 ms to 125 μs.Frontiers in neuroscience · 2015Article
- Implementation of a spike-based perceptron learning rule using TiO2-x memristors.Frontiers in neuroscience · 2015Article
- Tunnel junction based memristors as artificial synapses.Frontiers in neuroscience · 2015Article
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Authors and funding
8 authors.
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No grant is acknowledged in the PubMed record.
Abstract
Synaptic dynamics, such as long- and short-term plasticity, play an important role in the complexity and biological realism achievable when running neural networks on a neuromorphic IC. For example, they endow the IC with an ability to adapt and learn from its environment. In order to achieve the millisecond to second time constants required for these synaptic dynamics, analog subthreshold circuits are usually employed. However, due to process variation and leakage problems, it is almost impossible to port these types of circuits to modern sub-100nm technologies. In contrast, we present a neuromorphic system in a 28 nm CMOS process that employs switched capacitor (SC) circuits to implement 128 short term plasticity presynapses as well as 8192 stop-learning synapses. The neuromorphic system consumes an area of 0.36 mm(2) and runs at a power consumption of 1.9 mW. The circuit makes use of a technique for minimizing leakage effects allowing for real-time operation with time constants up to several seconds. Since we rely on SC techniques for all calculations, the system is composed of only generic mixed-signal building blocks. These generic building blocks make the system easy to port between technologies and the large digital circuit part inherent in an SC system benefits fully from technology scaling.
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