ArticleFrontiers in neuroscience2012
Is a 4-bit synaptic weight resolution enough? - constraints on enabling spike-timing dependent plasticity in neuromorphic hardware.
Article in Frontiers in neuroscience, 2012. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Cited by 21 papers.
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Who cites it
21 citing papers in PubMed.
- Adaptive STDP-based on-chip spike pattern detection.Frontiers in neuroscience · 2023Article
- A System-on-Chip Based Hybrid Neuromorphic Compute Node Architecture for Reproducible Hyper-Real-Time Simulations of Spiking Neural Networks.Frontiers in neuroinformatics · 2022Article
- Dynamical Characteristics of Recurrent Neuronal Networks Are Robust Against Low Synaptic Weight Resolution.Frontiers in neuroscience · 2021Article
- Article
- An Adaptive STDP Learning Rule for Neuromorphic Systems.Frontiers in neuroscience · 2021Article
- Considerations for Neuromorphic Supercomputing in Semiconducting and Superconducting Optoelectronic Hardware.Frontiers in neuroscience · 2021Article
- Review
- Neural and Synaptic Array Transceiver: A Brain-Inspired Computing Framework for Embedded Learning.Frontiers in neuroscience · 2018Article
- Deep Learning With Spiking Neurons: Opportunities and Challenges.Frontiers in neuroscience · 2018Review
- Neuromorphic photonic networks using silicon photonic weight banks.Scientific reports · 2017Article
- Stochastic Synapses Enable Efficient Brain-Inspired Learning Machines.Frontiers in neuroscience · 2016Article
- A neuromorphic implementation of multiple spike-timing synaptic plasticity rules for large-scale neural networks.Frontiers in neuroscience · 2015Article
- Comparing Neuromorphic Solutions in Action: Implementing a Bio-Inspired Solution to a Benchmark Classification Task on Three Parallel-Computing Platforms.Frontiers in neuroscience · 2015Article
- Robustness of spiking Deep Belief Networks to noise and reduced bit precision of neuro-inspired hardware platforms.Frontiers in neuroscience · 2015Article
- A neuromorphic network for generic multivariate data classification.Proceedings of the National Academy of Sciences of the United States of America · 2014Article
- A framework for plasticity implementation on the SpiNNaker neural architecture.Frontiers in neuroscience · 2014Article
- Racing to learn: statistical inference and learning in a single spiking neuron with adaptive kernels.Frontiers in neuroscience · 2014Article
- Characterization and compensation of network-level anomalies in mixed-signal neuromorphic modeling platforms.PloS one · 2014Article
- Six networks on a universal neuromorphic computing substrate.Frontiers in neuroscience · 2013Article
- Reward-based learning under hardware constraints-using a RISC processor embedded in a neuromorphic substrate.Frontiers in neuroscience · 2013Article
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7 authors.
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Abstract
Large-scale neuromorphic hardware systems typically bear the trade-off between detail level and required chip resources. Especially when implementing spike-timing dependent plasticity, reduction in resources leads to limitations as compared to floating point precision. By design, a natural modification that saves resources would be reducing synaptic weight resolution. In this study, we give an estimate for the impact of synaptic weight discretization on different levels, ranging from random walks of individual weights to computer simulations of spiking neural networks. The FACETS wafer-scale hardware system offers a 4-bit resolution of synaptic weights, which is shown to be sufficient within the scope of our network benchmark. Our findings indicate that increasing the resolution may not even be useful in light of further restrictions of customized mixed-signal synapses. In addition, variations due to production imperfections are investigated and shown to be uncritical in the context of the presented study. Our results represent a general framework for setting up and configuring hardware-constrained synapses. We suggest how weight discretization could be considered for other backends dedicated to large-scale simulations. Thus, our proposition of a good hardware verification practice may rise synergy effects between hardware developers and neuroscientists.
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